As storage devices continue to be fabricated with increased storage density and decreased physical size, the time needed to reliably complete programming or read operations in the non-volatile memory cells of those storage devices can vary greatly. The variance in read and/or program operation time can vary on a lot-by-lot, die-by-die and/or on a smaller scale within a die due to process variations at the manufacturing stage. Separately or in addition to manufacturing variations, the read and program operation times of higher density memory devices can be affected by data pattern variations. For example, the differing combinations of high or low voltages applied to a particular block of non-volatile memory can lead to capacitive coupling between adjacent bit lines or word lines that can influence programming and read operation times. Similarly, operating temperature variations can lead to different read or program operation times between particular die, bit lines or word lines. Efforts to detect read or programming errors and adjust one or more timing parameters of a memory device can often introduce significant delay in the execution of read and program operations that may outweigh the benefits.